发明名称 Memory Apparatus, Cache Control Method, and Cache Control Program
摘要 A memory apparatus including: a cache control section to control a cache memory for an auxiliary storage apparatus; a volatile memory; and a nonvolatile memory, wherein the cache memory for the auxiliary storage apparatus is configured to have a volatile cache memory provided in the volatile memory and a nonvolatile cache memory provided in the nonvolatile memory, and wherein the cache control section accesses the nonvolatile cache memory using a write back method.
申请公布号 US2008162822(A1) 申请公布日期 2008.07.03
申请号 US20070940825 申请日期 2007.11.15
申请人 OKUYAMA KENJI;SUZUKI TOMOHIRO;TAMURA YUJI;ISHIKAWA TETSUYA;NISHIMURA HIROYASU;OGAWA TOMOYA;UCHIDA FUMIKAGE;MOROMIZATO NAO;EGUCHI MUNETOSHI 发明人 OKUYAMA KENJI;SUZUKI TOMOHIRO;TAMURA YUJI;ISHIKAWA TETSUYA;NISHIMURA HIROYASU;OGAWA TOMOYA;UCHIDA FUMIKAGE;MOROMIZATO NAO;EGUCHI MUNETOSHI
分类号 G06F12/00 主分类号 G06F12/00
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