发明名称 INSPECTION METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an inspection method for a semiconductor integrated circuit including an equalization process for generating a burn-in test pattern for equalizing the number of times of toggling on each element level of the semiconductor integrated circuit. SOLUTION: This inspection method for the semiconductor integrated circuit includes a burn-in pattern generating process for generating a burn-in test pattern for performing a burn-in test for the integrated circuit, and the generating process is characterized by including an equalization process for generating an equalization burn-in test pattern equalizing the number of times of toggling on each element level of the semiconductor integrated circuit. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008151701(A) 申请公布日期 2008.07.03
申请号 JP20060341372 申请日期 2006.12.19
申请人 TOYOTA MOTOR CORP 发明人 NISHIURA HARUO
分类号 G01R31/3183;H01L21/82;H01L21/822;H01L27/04 主分类号 G01R31/3183
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