| 摘要 |
A multi-modulus frequency divider is provided to reduce the size of circuit by omitting capacitors, resistors, and inductors therein. A multi-modulus frequency divider includes an input delay cell(110), a ring voltage control oscillator(100), a bias circuit(180), and a control signal generator(190). The input delay cell delays input frequency signals. The ring voltage control oscillator, which includes plural first and second type delay cells and plural switches, receives the delayed input frequency signals and supplies output frequency signals whose frequency division ratio is determined by operations of the switches. The bias circuit generates bias voltages for controlling currents, which are supplied to the input delay cell and the first and second type delay cells. The control signal generator generates switch control signals for controlling the switches and current control signals for controlling currents flowing in the second type delay cells. |
