| 摘要 |
An integrated circuit arrangement ( 1; 2; 3; 4 ) for setting a predefined phase difference (phi_target) between a first high-frequency signal (x 1 ; x 1 p, x 1 n) and a second high-frequency signal (x 2 ; x 2 p, x 2 n), comprising: e) a chain connection of a plurality (N) of basic circuits ( 10; 20; 30; 40 ), whereby each basic circuit has a first transmission line ( 11; 11 p, 11 n) for transmitting the first signal (x 1 ; x 1 p, x 1 n), a second transmission line ( 12; 12 p, 12 n) for transmitting the second signal (x 2 ; x 2 p, x 2 n), and a controllable phase-influencing means ( 13; 23; 33; 43 ), connected to the first transmission line, for controllably influencing the phase of the first signal, f) a phase difference detector ( 14; 34 ), which is connected to the output-side basic circuit and is formed to detect a current phase difference (phi_actual) between the first and second signal, g) a control unit ( 15; 35 ), which is connected to the phase difference detector and each controllable phase-influencing means ( 13; 23; 33; 43 ) and is formed to generate first digital control voltages, dependent on the current phase difference (phi_actual), as control signals (vt 1 , vt 2 , . . . ) for each phase-influencing means ( 13; 23; 33; 43 ), whereby the digital control voltage can assume only two different voltage values, and h) whereby each controllable phase-influencing means ( 13; 23; 33; 43 ;) has at least one first tunable capacitive unit ( 16; 16 p, 16 n; 46 p, 46 n), which is connected to the first transmission line and the control unit and is designed to delay the first signal depending on one of the first control signals.
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