发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
摘要 A trench gate type power transistor of high performance is provided. A trench gate as a gate electrode is formed in a super junction structure comprising a drain layer and an epitaxial layer. In this case, the gate electrode is formed in such a manner that an upper surface of the epitaxial layer becomes higher than that of a channel layer formed over the drain layer. Then, an insulating film is formed over each of the channel layer and the epitaxial layer and thereafter a part of the insulating film is removed to form side wall spacers over side walls of the epitaxial layer. Subsequently, with the side wall spacers as masks, a part of the channel layer and that of the drain layer are removed to form a trench for a trench gate.
申请公布号 US2008160702(A1) 申请公布日期 2008.07.03
申请号 US20070958363 申请日期 2007.12.17
申请人 NAKAZAWA YOSHITO;MATSUURA HITOSHI 发明人 NAKAZAWA YOSHITO;MATSUURA HITOSHI
分类号 H01L21/336 主分类号 H01L21/336
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