| 摘要 |
In a MOS solid-state imaging device, each of a plurality of pixel cells has a charge holding unit 305 . In order to reset the signal charge accumulated in the charge holding unit 305 in each pixel cell in an n-th row, the reset pulse supplied to the gate electrode of the reset transistor is switched to the high potential level Hi. Under this state, the reference voltage source VDDCELL is switched to the low potential level Lo. In response, the reset pulse n temporarily drops toward Lo because of the coupling capacity 308 . The reset pulse n is switched to Lo after its potential rises back to Hi.
|
