发明名称 |
Non-volatile memory component has memory cell array for storing data , page buffer having bitline selection device, which is configured for selectively coupling bit lines on scanning node |
摘要 |
<p>The memory component has a memory cell array for storing data , a page buffer , which is coupled on the memory cell array over two bit lines . The page buffer has a bitline selection device, which is configured for selectively coupling the bit lines on a scanning node. The two registers are configured to store given data. A data comparison device is configured for comparing the data stored in former register with the data stored in the later register and for transmitting a comparison result to the scanning node. An independent claim is also included for a method for programing a multi level cell (MLC) memory cell in a non volatile memory element.</p> |
申请公布号 |
DE102007026856(A1) |
申请公布日期 |
2008.07.03 |
申请号 |
DE20071026856 |
申请日期 |
2007.06.11 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
WANG, JONG HYUN;PARK, SE CHUN;PARK, SEONG HUN |
分类号 |
G11C11/56;G11C16/26 |
主分类号 |
G11C11/56 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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