| 摘要 |
A method for forming a semiconductor device comprising forming an inter-layer dielectric (ILD) layer on a semiconductor substrate; forming a first trench and second trench in a cell area on the ILD layer, wherein the second trench has a width which is wider than the first trench; forming a first metal layer on the substrate, such that the first metal layer fills the first trench and does not entirely fill the second trench; performing a planarization process on the first metal layer such that the surface of the first metal layer in the first trench and the surface of the substrate has a height which is different than the height of the surface of the first metal layer in the second trench; and forming a plurality of align key and overlay key areas by forming a second metal layer on the surface of the substrate and first metal layer.
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