| 摘要 |
<p>A method of manufacturing a nonvolatile memory device is provided to increase coupling ratio by increasing an area between a control gate and a floating gate, and to reduce capacitance between the cells by forming the floating gate as the 'U' shape. An active region and an isolation region are defined at a semiconductor substrate(100). A gate insulation layer(102) and a first conductive layer(104) are formed at the active region, and a device isolation layer(108) which is protruded higher than the first conductive layer is formed at the isolation layer. A protruded part of the device isolation layer is etched so as to decrease a width thereof. A second conductive layer(112a) is formed at a sidewall of the device isolation layer and at the upper part of the first conductive layer.</p> |
