发明名称 FAILURE ANALYSIS AND TESTING OF SEMI-CONDUCTOR DEVICES USING INTELLIGENT SOFTWARE ON AUTOMATED TEST EQUIPMENT (ATE)
摘要 The invention provides a number of related methods which improve the test and analysis of integrated circuit devices. A first method of the invention provides a method for pausing on a SCAN based test. A second method of the invention provides a method for using stimulations and responses of a slown good device to increase fault coverage of patterns in a test flow. A third method of the invention provides a method to curve trace device buffers on an ATE.
申请公布号 US2008162070(A1) 申请公布日期 2008.07.03
申请号 US20070964920 申请日期 2007.12.27
申请人 LSI LOGIC CORPORATION 发明人 YACOBUCCI ROGER
分类号 G06F19/00 主分类号 G06F19/00
代理机构 代理人
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