发明名称 POWER SUPPLY NOISE ANALYSIS MODEL GENERATING METHOD AND POWER SUPPLY NOISE ANALYSIS MODEL GENERATING APPARATUS
摘要 An object is to simplify a power supply noise analysis model of a circuit board. CAD data of the circuit board is obtained from a CAD apparatus, and overlapping power supply islands among power supply islands existing in different layers of the circuit board are extracted as a power supply pair. Nodes are arranged in the extracted power supply pair, and the nodes of the power supply pair are projected on the power supply islands to which the power supply pair belongs. A mesh region which encloses each node is determined for each power supply island, and impedance (L, R, C) between nodes is calculated. Then, a power supply noise analysis model is created based on the impedance between nodes in each layer, and a capacitance between layers.
申请公布号 US2008163138(A1) 申请公布日期 2008.07.03
申请号 US20070864122 申请日期 2007.09.28
申请人 FUJITSU LIMITED 发明人 IWAKURA YOSHIYUKI;FUJIMORI SHOGO;HIRAI TENDOU;CHIDA HITOSHI;KANEI KAZUYOSHI;NIMURA KOUTAROU
分类号 G06F17/50 主分类号 G06F17/50
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