| 摘要 |
A method for fabricating a dual poly gate in a semiconductor device is disclosed. The method comprises forming a gate insulating layer over a semiconductor substrate including a first region and a second region, forming a first conductive type polysilicon layer and a second conductive type polysilicon layer in the first and second regions, respectively, depositing a gate metal layer and a hard mask layer over the first conductive type and second conductive type polysilicon layers, patterning the hard mask layer to form a hard mask pattern, etching the gate metal layer using the hard mask pattern as an etching mask until the surfaces of the first conductive type and second conductive type polysilicon layers are exposed, implanting inert ions into the first conductive type and second conductive type polysilicon layers using the hard mask pattern for ion implantation to form an amorphous silicon film, and etching the amorphous silicon films and the gate insulating layer using the hard mask pattern as an etching mask to form a gate stack.
|
