| 摘要 |
<P>PROBLEM TO BE SOLVED: To solve the problem that operational speed of a whole SRAM (static random access memory) deteriorates since operation speeds differ largely in selection time and non-selection time of a wordline. <P>SOLUTION: A semiconductor storage device which operates using a first and second power supply voltages is equipped with; a memory cell MC which is supplied with the first power supply voltage; a wordline WL connected to the memory cell MC; and a decoder 15 which controls selection/non-selection of the wordline WL based on an address signal which has the second power supply voltage. The decoder 15 includes a level shifter 15A which changes the voltage level of the wordline WL to the first power supply voltage, and a switch circuit 15B which supplies a voltage lower than the first power supply voltage to the level shifter 15A when the first power supply voltage is supplied and the wordline WL is selected. <P>COPYRIGHT: (C)2008,JPO&INPIT |
