发明名称 DIGITAL LINEAR TRANSMITTER ARCHITECTURE
摘要 <p>A digital linear transmitter for digital to analog conversion of a radio frequency signal. The transmitter includes a delta sigma (?S) digital to analog converter (DAC) and a weighted signal digital to analog converter in the transmit path of a wireless device to reduce reliance on relatively large analog components. The ?S DAC converts the lowest significant bits of the oversampled signal while the weighted signal digital to analog converter converts the highest significant bits of the oversampled signal. The transmitter core includes components for providing an oversampled modulated digital signal which is then subjected to first order filtering of the oversampled signal prior to generating a corresponding analog signal. The apparatus and method reduces analog components and increases digital components in transmitter core architecture of wireless RF devices.</p>
申请公布号 WO2008077235(A1) 申请公布日期 2008.07.03
申请号 WO2007CA02252 申请日期 2007.12.14
申请人 SIRIFIC WIRELESS CORPORATION;MANKU, TAJINDER;BELLAOUAR, ABDELLATIF 发明人 MANKU, TAJINDER;BELLAOUAR, ABDELLATIF
分类号 H04B1/04;H03M1/66;H03M3/00 主分类号 H04B1/04
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