发明名称 MULTICHIP PACKAGE AND FORMATION METHOD THEREOF
摘要 <P>PROBLEM TO BE SOLVED: To provide a multichip package structure, where a substrate having a die holding cavity formed within the range of an upper surface and a first through-hole structure is included, and a terminal pad is formed at the lower portion of the first through-hole structure. <P>SOLUTION: The multichip package structure includes the substrate having the die holding cavity formed within the range of the upper surface and the first through-hole structure, where the terminal pad is formed at the lower portion of the first through-hole structure. A first die is arranged in the die holding cavity, and a first dielectric layer is formed on the first die and the substrate. A first redistribution conductive layer (RDL) is formed on the first dielectric layer. A second dielectric layer is formed on the first RDL and a second die is mounted on a second dielectric layer. A surrounding material surrounds the second die. A second redistribution conductive layer (RDL) is formed on a third dielectric layer. A protective layer is formed on the second RDL. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008153654(A) 申请公布日期 2008.07.03
申请号 JP20070317569 申请日期 2007.12.07
申请人 ADVANCED CHIP ENGINEERING TECHNOLOGY INC 发明人 YANG WEN-KUN
分类号 H01L25/10;H01L25/11;H01L25/18 主分类号 H01L25/10
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