| 摘要 |
A method for forming an interlayer dielectric of a semiconductor device is provided to stabilize an electrical property of a transistor by suppressing the generation of a turn off current. A transistor having a source/drain region(304a) and a gate(304b) is formed between device isolation regions(302) on a semiconductor substrate(300). A metal film is formed on an overall surface of the semiconductor substrate by sputtering Ti or Co metal. An RTP(Rapid Thermal Process) process is performed on the semiconductor substrate to form a silicide(310) thereon. During a PMD(Pre-Metal Dielectric) liner process, a PE-CVD(Plasma Enhanced Chemical Vapor Deposition) process is performed to deposit an SRO layer(312) with a thickness of 1500 Å. A PMD BPSG(Borophospho Silicate Glass Spectroscope) or a PSG(Phosphor Silicate Glass) is deposited as a PMD layer(314), such that an interlayer dielectric is formed.
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