| 摘要 |
<p>A manufacturing method of a non volatile memory device is provided to restrict a bridge fail by forming a mask on a select transistor and a device isolation layer. An active region and an isolation region are defined on a semiconductor substrate(302). A first conductive layer(306) is formed at the active region, and a device isolation layer(308) is formed at the isolation region. An etching process is performed to reduce the height of the device isolation layers excluding the device isolation layer of a region in which a select line is to be formed. A dielectric layer is formed on the semiconductor substrate including the first conductive layer. A part of the dielectric layer is removed to expose the first conductive layer. A second conductive layer(314) is formed on the dielectric layer including the first conductive layer.</p> |
