| 摘要 |
<p>A flash memory device and a manufacturing method thereof are provided to improve program disturbance property by restricting hot carrier generated at a junction shared by a select transistor and adjacent cells to reduce threshold voltage shift. A source select line(SSL) is formed on a first gate insulating layer(225) of a source select transistor region. A drain select line(DSL) is formed on a second gate insulating layer(220c) of a drain select transistor region. A floating gate(230), a dielectric layer(240) and word lines(WL0-WLn) are formed on a tunnel insulating layer(220b) of a memory cell region. A part of a semiconductor substrate(200) is exposed by patterning the first and second gate insulating layers and the tunnel insulating layer. A junction region(250) is formed on the semiconductor substrate by performing an ion implantation process to the intervals of word lines, word lines and select lines and select lines.</p> |
