| 摘要 |
A TFT(Thin Film Transistor) array substrate and a method for testing the thin film pattern are provided to compensate the process deviation and error by forming an align test pattern and obtaining the misalignment rate from measuring the capacitance of the test pattern, and resultantly to minimize the misalignment. Multiple thin film patterns are formed on the display area of a substrate. An align test pattern is formed on the non-display area of the substrate, and is used to test the alignment of the thin film patterns. The align test pattern includes the first and second test lines in a regular shape. First finger parts(111) are extended from the first test line to the direction of the second test line at regular intervals. Second finger parts(113) are extended from the second test line to the direction of the first test line at regular intervals. The first and the second finger parts are arranged alternately in order. A gate insulation layer(144) and a passivation layer(150) are located between the first and the second finger parts to form a capacitor(C). |
