发明名称 |
Methods and apparatus for improving processing performance by controlling latch points |
摘要 |
Methods and apparatus provide for performing pre-execution processes to prepare instructions of an instruction set for further processing; executing the instructions in a pipeline of execution stages using digital logic for processing data in accordance with the instructions within one clock cycle per stage; latching the data each clock cycle for delivery to a next execution stage using one or more of a plurality of latch point circuits; and controlling each of the latch point circuits to operate as a buffer or as a latch.
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申请公布号 |
US7395411(B2) |
申请公布日期 |
2008.07.01 |
申请号 |
US20050079565 |
申请日期 |
2005.03.14 |
申请人 |
SONY COMPUTER ENTERTAINMENT INC. |
发明人 |
KASAHARA EIJI |
分类号 |
G06F9/312;G06F9/315 |
主分类号 |
G06F9/312 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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