METHOD FOR FORMING FINE PATTERN IN SEIICONDUCTOR DEVICE

摘要

A method for forming a fine pattern of a semiconductor device is provided to reduce the width of line/space pattern below 20nm by overcoming the limit of a photolithography process. A first hard mask layer is formed on an etching target layer(20). A first etch mask pattern(22A) having a negative slope is formed on the first hard mask layer. A spacer is formed on a sidewall of the first etch mask pattern. A second etch mask material layer is formed on the upper surface of the entire structure. A second etch mask pattern(24A) is buried between the spacer and the spacer by performing a planarization process until the first etch mask pattern is exposed. The spacer is removed. The first hard mask layer and the etching target layer are etched by using the first and second etch mask patterns.