发明名称 Phase locked loop
摘要 A phase locked loop circuit, for providing an oscillating output signal at an output frequency, including: a reference counter; a loop counter; a phase detector having a first input coupled to the reference counter and a second input coupled to the loop counter; a voltage controlled oscillator having an input coupled to the output of the phase detector and an output for providing the oscillating output signal; a feedback loop coupling the output of the voltage controlled oscillator to the input of the loop counter; and delay circuitry, including a feedback loop, arranged to introduce a discrete delay into the output of the loop counter and/or the reference counter.
申请公布号 US7394322(B2) 申请公布日期 2008.07.01
申请号 US20030540961 申请日期 2003.12.19
申请人 NOKIA CORPORATION 发明人 BEESON PETER
分类号 H03L7/00;H03L7/081;H03L7/197 主分类号 H03L7/00
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