发明名称 Low temperature CVD process with selected stress of the CVD layer on CMOS devices
摘要 Device-enhancing coatings are deposited on CMOS devices by successively masking with photoresist each one of the sets of N-channel and P-channel devices while unmasking or leaving unmasked the other set, and after each step of successively masking one of the sets of devices, carrying out low temperature CVD steps with a toroidal RF plasma current while applying an RF plasma bias voltage. The temperature of the workpiece is held below a threshold photoresist removal temperature. The RF bias voltage is held at a level at which the coating is deposited with a first stress when the unmasked set consists of the P-channel devices and with a second stress when the unmasked set consists of N-channel devices.
申请公布号 US7393765(B2) 申请公布日期 2008.07.01
申请号 US20070788523 申请日期 2007.04.19
申请人 发明人
分类号 H01L21/44;H01L21/425 主分类号 H01L21/44
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