发明名称 |
Semiconductor devices and method of fabrication |
摘要 |
A semiconductor having an ~5V operational range, including a drain side enhanced gate-overlapped LDD (GOLD) and a source side halo implant region and well implant. A method in accordance with an embodiment of the invention comprises forming a gate electrode overlying a substrate and a very lightly doped epitaxial layer formed on the substrate. A high energy implant region forms a well in a source side of the lightly doped epitaxial layer. A self-aligned halo implant region is formed on a source side of the device and within the high energy well implant. An implant region on a drain side of the lightly doped epitaxial layer forms the gate overlapped LDD (GOLD). A doped region within the halo implant region forms a source. A doped region within the gate overlapped LDD (GOLD) forms a drain. The structure enables the manufacture of a deep submicron (<0.3 mum) power MOSFET using existing 0.13 mum process flow without additional masks and processing steps.
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申请公布号 |
US7393752(B2) |
申请公布日期 |
2008.07.01 |
申请号 |
US20050189587 |
申请日期 |
2005.07.25 |
申请人 |
FREESCALE SEMICONDUCTOR, INC. |
发明人 |
YANG HONGNING;ZUO JIANG-KAI |
分类号 |
H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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