发明名称 WAFER LEVEL PACKAGE WITH DIE RECEIVING CAVITY AND METHOD OF THE SAME
摘要 Wafer Level Package with Die Receiving Cavity and Method of the Same The present invention provides a structure of package comprising a substrate with a die receiving cavity formed within an upper surface of the substrate and a through hole structure formed there through, wherein a terminal pad is formed under the through hole structure and the substrate includes a conductive trace formed on a lower surface of the substrate. A die is disposed within the die receiving cavity by adhesion and a dielectric layer formed on the die and the substrate. A re-distribution metal layer (RDL) is formed on the dielectric layer and coupled to the die and the through hole structure. Conductive bumps are coupled to the terminal pad.
申请公布号 SG143185(A1) 申请公布日期 2008.06.27
申请号 SG20070179260 申请日期 2007.11.19
申请人 ADVANCED CHIP ENGINEERING TECHNOLOGY INC. 发明人 YANG WEN-KUN;CHANG JUI-HSIEN
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