DISPOSITIF DE MEMOIRE NON VOLATILE A RAFRAICHISSEMENT PERIODIQUE ET PROCEDE DE PROGRAMMATION D'UN TEL DISPOSITIF

摘要

The device has an analog core (8) with a data control block (12) controlling operating modes of a memory and including a memory refreshing algorithm for periodically reprogramming non-volatile memory cells (9) subjected to a charge loss. The block (12) comprises an algorithm for decoding and reorganizing data bits in a redundant manner. The block (12) has a multiplexer which delivers 8 successive words of 8 bits to a 64 bit register from incident 8 bit word. The bits are delivered to a coding block (14) of an error correction block (13) including a hamming type error correction code. An independent claim is also included for a method of programming a non-volatile memory device.