发明名称 Interconnected integrated circuit device e.g. dynamic D flip-flop, forming method for electronic component, involves forming set of interconnection layers connected to semiconductor device and another set of layers, on active layer surface
摘要 #CMT# #/CMT# The method involves forming an integrated circuit (108) on a surface of a semiconductor based active layer of a substrate, where the circuit has semiconductor devices arranged between a set of interconnection layers (110, 112) and the substrate. The circuit is stuck on a substrate (116) without an alignment pattern. Thick and intermediate layers (102, 104) are removed from the former substrate. Another set of interconnection layers connected to one of the devices, the former set of interconnection layers and the active layer, are formed on another surface of the active layer. #CMT#USE : #/CMT# Method for forming an interconnected integrated circuit device e.g. static RAM memory cell, or dynamic D flip-flop, for forming an electronic component (all claimed). Can also be used for NAND gate and NOR gate. #CMT#ADVANTAGE : #/CMT# The method increases the number of interconnections layers, while avoiding material and dimensional constraints on the interconnection layers, thus increasing the integration density of the elementary functions in the integrated circuit, and improving the fabrication yield of the integrated circuit devices. The method reduces parasitic resistance and stray capacitance related to interconnections in order to optimize the performances of the integrated circuit devices. The method reduces capacitive coupling between the interconnection layers so as to ensure an additional flexibility during designing of the integrated circuit. The method is compatible with the existing linking technologies of the fabrication of microelectronic devices. #CMT#DESCRIPTION OF DRAWINGS : #/CMT# The drawing shows a schematic view illustrating a step of an interconnected integrated circuit device forming method. 100 : Interconnected integrated circuit device 102 : Thick layer 104 : Intermediate layer 108 : Integrated circuit 110, 112 : Interconnection layers 116 : Substrate without alignment pattern #CMT#INORGANIC CHEMISTRY : #/CMT# One intermediate layer is made of oxide and/or nitride and/or semiconductor different from that of the other intermediate layer and the active layer.
申请公布号 FR2910704(A1) 申请公布日期 2008.06.27
申请号 FR20070054324 申请日期 2007.04.05
申请人 COMMISSARIAT A L'ENERGIE ATOMIQUE ETABLISSEMENT PUBLIC £ CARACTERE INDUSTRIEL ET COMMERCIAL 发明人 POIROUX THIERRY;BILLIOT GERARD;VINET MAUD;FRABOULET DAVID
分类号 H01L21/98;H01L23/50;H01L25/065 主分类号 H01L21/98
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