| 摘要 |
PROBLEM TO BE SOLVED: To lower a program voltage, and also to reduce a stress-induced leakage current. SOLUTION: A memory device includes a semiconductor substrate 1; a source region 8a and a drain region 8b separately formed on the semiconductor substrate; and a structure with a first insulating layer 3b<SB>1</SB>having an electron capture site, a second insulating layer 3a having no capture site, and a third insulating layer 3b<SB>2</SB>having the capture site laminated, and formed on the semiconductor substrate between the source region and the drain region. The electron capture site of the memory element has a first insulating film 3 positioned at the conduction band level energy lower than that of the first to the third insulating layers and higher than that of the silicon, a floating gate electrode 4 formed on the first insulating film, a second insulating film 5 formed on the floating gate electrode, and a control gate electrode 6 formed on the second insulating film. COPYRIGHT: (C)2008,JPO&INPIT
|
