| 摘要 |
<p>An overlay vernier of a semiconductor device and a method for forming the semiconductor device using the same are provided to form projected and recessed patterns, using a double patterning process, and to complement the damage of the mother verniers so as to improve interlayer overlap and to increase margin of an alignment process. An etched layer(110) containing a mother vernier of an overlay vernier is installed on a semiconductor substrate(100). The etched layer is one of interlayer materials used for a process of forming a device separating layer, a gate, and a bit line. An overlay vernier region of the etched layer includes a first mother vernier(120) having a projected pattern, and a second mother vernier(130) having a recessed pattern. The second mother vernier is installed in the first mother vernier.</p> |
