发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING SAME
摘要 PROBLEM TO BE SOLVED: To solve the problem, wherein when conventionally the potential of a support substrate is fixed, the occurrence of a parasitic transistor using the support substrate as a gate makes impact ions generated also from near an embedded insulating layer near the drain and tend to cause parasitic bipolar operation. SOLUTION: This method includes the steps of forming a LOCOS and a gate oxide layer reaching the embedded insulating layer, and a polysilicon layer, acting as a gate electrode and patterning them; forming a second conductivity-type high concentration impurity in a very shallow portion of the source region and the drain region; a second conductivity-type impurity region of low concentration in the lower portion therefrom, and a second conductivity-type impurity region of high concentration in a further lower and higher portion than the embedded insulating layer; forming a sidewall around the gate electrode; forming a second conductivity-type impurity region in the source region and the drain region; forming an insulating interlayer, to form a contact hole in the source region and the drain region; and the gate electrode; and forming wiring on the insulating interlayer. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008147696(A) 申请公布日期 2008.06.26
申请号 JP20080024196 申请日期 2008.02.04
申请人 SEIKO INSTRUMENTS INC 发明人 WAKE YOSHIKAZU;YOSHIDA YOSHIFUMI
分类号 H01L29/786;H01L21/336;H01L21/8238;H01L27/08;H01L27/092 主分类号 H01L29/786
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