发明名称 |
SEMICONDUCTOR MEMORY DEVICE AND ADDRESS DETERMINATION METHOD THEREOF |
摘要 |
A semiconductor memory device and an address determination method thereof are provided to reduce signal distortion and power consumption, by decreasing the length of a bit line. A plurality of sub arrays(100) include memory cells arranged in rows and columns. A pre-decoder circuit outputs a decoded row address by receiving a row address. A block selection circuit generates a selection signal to select each sub array by receiving 2 bits of most significant bits of the row address. A row decoder(110) corresponds to each sub array, and selects rows of a sub array corresponding to a corresponding selection signal outputted from the block selection circuit and the output of the pre-decoder circuit.
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申请公布号 |
KR20080058684(A) |
申请公布日期 |
2008.06.26 |
申请号 |
KR20060132692 |
申请日期 |
2006.12.22 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
SHIN, SUNG WOO |
分类号 |
G11C11/408;G11C8/10;G11C8/12;G11C11/405 |
主分类号 |
G11C11/408 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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