| 摘要 |
The present invention relates to a voltage-to-current transconductance stage arrangement comprising a single-ended input, an emitter-coupled pair of transistors (1,2), comprising a first transistor (1) and a second transistor (2), the emitter of a third transistor (3) , being connected to the collector of said first transistor (1), and differential output. It further comprises at least one common-collector transistor comprising a fourth transistor (4) connected to the base of said second transistor (2) preferably or optionally also and a fifth transistor (5) connected to the base of said third transistor (3). The size of said fourth (4), or fourth and fifth transistors (4,5) considerably exceed the sizes of said second and third transistors. They are biased at "off-state". An extra inductor at the collector of the transistor (4) may be applied to further increase linearity. |
