发明名称 |
Semiconductor integrated circuit |
摘要 |
A semiconductor integrated circuit in which a semiconductor chip 4 having a semiconductor memory and a mother chip 2 having logic circuit are mounted in a single package, wherein the leak current of the semiconductor chip 4 is reduced in standby state. A switch cell 20 that connects to the power pad 10 of the semiconductor chip 4 and that supplies power voltage from the exterior to the semiconductor chip 4 is provided to the mother chip 2 . The switch cell 20 cuts off the connection between the power pad 10 of the semiconductor chip 4 and the power voltage line of the semiconductor memory of the mother chip 2 by using a control signal from a control circuit when the semiconductor memory is in standby mode. Leak current generated in the semiconductor memory can thereby be reduced.
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申请公布号 |
US2008151676(A1) |
申请公布日期 |
2008.06.26 |
申请号 |
US20070000629 |
申请日期 |
2007.12.14 |
申请人 |
SANYO ELECTRIC CO., LTD.;SANYO SEMICONDUCTOR CO., LTD. |
发明人 |
MIZUTANI YOSUKE |
分类号 |
G11C5/14 |
主分类号 |
G11C5/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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