| 摘要 |
PROBLEM TO BE SOLVED: To perform simultaneously a test and replacement analysis for a plurality of memory circuits mounted on the same chip, and to suppress increment of additional circuits such as BIRA circuit to the absolute minimum for increment of the number of memory circuits. SOLUTION: The circuit is provided with a plurality of SRAMs 111 to 113 which are mounted on the same chip and has multi-bit constitution in which relief of an I/O direction can be performed, a plurality of comparing circuits 121 to 123 connected corresponding to output sides of respective SRAMs and comparing memory data of multi-bits output from the corresponding SRAM with expected value data of multi-bits, a logical circuit 13 collecting compared results of multi-bits output from the plurality of comparing circuits, a replacement analysis circuit 14 which is shared by the plurality of SRAMs, performs replacement analysis by processing data of multi-bits output from the logical circuit, and generates relief information relieving the plurality of SRAMs in the same way, and a fuse circuit 16 storing the relief information and performing relief for the plurality of SRAMs using the relief information. COPYRIGHT: (C)2008,JPO&INPIT
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