发明名称 INTEGRATED CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide simple error correction technology for an integrated circuit using retry control, having a wide correction range, and less peak current by a reset. <P>SOLUTION: In this integrated circuit, an output method of an exception handling signal and a reset signal to each module is designated by a high reliable error decision reset circuit 11 decoding an error detection signal outputted from a circuit detecting an error in an arbitrary flip-flop in a module included in the integrated circuit such as a CPU (Central Processing Unit), a retry control part, a peripheral circuit or the like, high-speed reset processing having less peak current is performed, and an instruction before the error is retried by the retry control, so that the error in the integrated circuit is corrected. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008146188(A) 申请公布日期 2008.06.26
申请号 JP20060330122 申请日期 2006.12.07
申请人 RENESAS TECHNOLOGY CORP 发明人 SAKATA TERUAKI;HIROTSU TEPPEI;YAMADA HIROMICHI
分类号 G06F11/14 主分类号 G06F11/14
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