发明名称 |
SENSE AMPLIFIER CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE AND OPERATION METHOD THERE-OF |
摘要 |
A sense amplifier circuit of a semiconductor memory device and an operation method thereof are provided to improve data sensing characteristics, and to reduce chip size by removing or reducing a dummy cell. A bit line sense amplifier(611,612) is connected to a bit line, and senses and amplifies a signal of the bit line. A calibration circuit(620) calibrates a voltage level of the bit line on the basis of a logic threshold of the bit line sense amplifier. After the voltage level of the bit line is calibrated, the bit line sense amplifier senses and amplifies a signal of the bit line. The bit line sense amplifier comprises a 2-stage cascade type latch.
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申请公布号 |
KR20080058950(A) |
申请公布日期 |
2008.06.26 |
申请号 |
KR20060133208 |
申请日期 |
2006.12.22 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM, MYEONG O;KIM, SOO HWAN;LEE, JONG CHEOL |
分类号 |
G11C7/06;G11C5/14;G11C7/12 |
主分类号 |
G11C7/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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