发明名称 METHOD FOR MANUFACTURING MASK OF SEMICONDUCTOR INTEGRATED CIRCUIT, AND MASK DATA CREATION SYSTEM
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a mask to reduce the time required for an OPC process. <P>SOLUTION: The method for manufacturing a mask includes steps of: (a) dividing a layout 10 of a semiconductor integrated circuit into a plurality of unit regions 20; (b) defining a process region 40 including each unit region 20; (c) extracting an optically influential region 30 optically influencing the unit region 20 from the process region 40; (d) carrying out an OPC process on a figure in the process region 40 to create an OPC layout; and (e) producing a mask based on the OPC layout. In the step (d), if a figure P4 in the process region 40 overlaps the optically influential region 30 and includes an abnormal portion Pb that is against the design criteria, the abnormal portion Pb is first eliminated from the figure P4 and then the OPC process is carried out. <P>COPYRIGHT: (C)2008,JPO&INPIT</p>
申请公布号 JP2008145600(A) 申请公布日期 2008.06.26
申请号 JP20060330888 申请日期 2006.12.07
申请人 NEC ELECTRONICS CORP 发明人 HAMAMOTO TAKESHI
分类号 G03F1/36;G03F1/68;H01L21/027 主分类号 G03F1/36
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