发明名称 Method of using scan chains and boundary scan for power saving
摘要 The invention provides a method and circuitry to save power in a synchronous logic ASIC with low overhead. The scan chain(s) and boundary scan mechanism of the synchronous logic ASIC are used and modified for shifting out current states of internal memory devices of the synchronous logic ASIC to an external memory and for retaining the power-off blocks' primary output values to the memory devices of the boundary scan circuit, so the proposed gated power method is efficient and low overhead in the synchronous, flop-based, logic circuit design.
申请公布号 US7392447(B2) 申请公布日期 2008.06.24
申请号 US20040971064 申请日期 2004.10.25
申请人 PRINCETON TECHNOLOGY CORPORATION 发明人 TANG YING YUAN;CHEN YUNG SEN;KAO DE YU
分类号 G01R31/28 主分类号 G01R31/28
代理机构 代理人
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