发明名称 Techniques for flip chip package migration
摘要 Techniques for integrated circuit packaging in a flip chip configuration that ensures a migration path between related integrated circuits and utilizes core I/O (or area I/O) are provided. An integrated circuit, having a superset of functional circuit elements as compared to a reference integrated circuit, includes first and second sets of interconnection elements to connect to a package substrate. The first and second sets have matching arrangements, and corresponding interconnection elements of the first and second set have consistent functional assignments. The first and second sets include interconnection elements of mixed functional assignments. The first set is disposed within an area matching a size and shape of the reference integrated circuit, while the second set is disposed outside the area. In a specific embodiment, the first set includes an I/O signal and is located in the core area.
申请公布号 US7391122(B1) 申请公布日期 2008.06.24
申请号 US20050073326 申请日期 2005.03.04
申请人 ALTERA CORPORATION 发明人 HOOL VINCENT
分类号 H01L23/48 主分类号 H01L23/48
代理机构 代理人
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