发明名称 Computer architecture for shared memory access
摘要 A computer architecture that includes a hierarchical memory system and one or more processors. The processors execute memory access instructions whose semantics are defined in terms of the hierarchical structure of the memory system. That is, rather than attempting to maintain the illusion that the memory system is shared by all processors such that changes made by one processor are immediately visible to other processors, the memory access instructions explicitly address access to a processor-specific memory, and data transfer between the processor-specific memory and the shared memory system. Various alternative embodiments of the memory system are compatible with these instructions. These alternative embodiments do not change the semantic meaning of a computer program which uses the memory access instructions, but allow different approaches to how and when data is actually passed from one processor to another.
申请公布号 US7392352(B2) 申请公布日期 2008.06.24
申请号 US20050176518 申请日期 2005.07.07
申请人 MASSACHUSETTS INSTITUTE OF TECHNOLOGY 发明人 MITHAL ARVIND;SHEN XIAOWEI;ROGEL LAWRENCE
分类号 G06F12/00 主分类号 G06F12/00
代理机构 代理人
主权项
地址