发明名称 Method and circuit for low-power detection of solder-joint network failures in digital electronic packages
摘要 A low power circuit and method for detects in-situ failures or precursors to failures in solder-joint networks on actual operational devices and packages in the field. An amplifying detector such as provided by a common-gate transistor sources current to the network to generate a signal voltage and a reference voltage that is sensitive to the low voltage applied to the other side of the network. Generation of this self-adjusting reference voltage makes the detection circuit insensitive to the network low-voltage. Additional power savings and performance gains can be provided with the addition of a differential amplifier to set a fixed bias point and a level shifter to cancel noise. The detected failure or precursor of a selected monitor solder-joint network(s) is an indicator of the integrity of other operational solder-joint networks in the package, on the PWB or between PWBs.
申请公布号 US2008144243(A1) 申请公布日期 2008.06.19
申请号 US20070803562 申请日期 2007.05.14
申请人 RIDGETOP GROUP, INC. 发明人 MARIANI GIORGIO;HOFMEISTER JAMES P.;JUDKINS JUSTIN B.
分类号 H02H9/04;G01R31/26 主分类号 H02H9/04
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