发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREFOR
摘要 The present invention is directed to realize high manufacture yield and compensate variations in threshold voltage of a MOS transistor with small overhead. A semiconductor integrated circuit includes a CMOS circuit for processing an input signal in an active mode, a control switch, and a control memory. The control switch supplies a pMOS body bias voltage and an nMOS body bias voltage to an N well in a pMOS transistor and a P well in an nMOS transistor, respectively, in the CMOS circuit. The control memory stores control information indicating whether or not the pMOS body bias voltage and the nMOS body bias voltage are supplied from the control switch to the N well in the pMOS transistor and the P well in the nMOS transistor, respectively, in the CMOS circuit in the active mode.
申请公布号 US2008143423(A1) 申请公布日期 2008.06.19
申请号 US20070943095 申请日期 2007.11.20
申请人 KOMATSU SHIGENOBU;OSADA KENICHI;YAMAOKA MASANAO;ISHIBASHI KOICHIRO 发明人 KOMATSU SHIGENOBU;OSADA KENICHI;YAMAOKA MASANAO;ISHIBASHI KOICHIRO
分类号 H03K3/01;H01L21/8238 主分类号 H03K3/01
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