发明名称 PLL CIRCUIT, AND CONTROL METHOD AND PROGRAM OF CONTROL VOLTAGE SUPPLIED TO VOLTAGE CONTROLLED OSCILLATOR IN PLL CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To solve a problem that in a digital terrestrial broadcasting system in which a SFN (single frequency network) is constructed for sending electric waves of an identical content at an identical time on an identical RF frequency from multiple transmitting stations, reception of transmission signals is disabled (SFN failure) in some areas where signals are redundantly received, when accuracy of a FFT clock of the transmission signals or transmission timings are misaligned. <P>SOLUTION: When an error of an exterior synchronizing clock is detected, based on a control voltage traced and recorded in a time of normal operation, an inclination of change of the control voltage to the exterior synchronizing clock is estimated by calculation, and the calculated and estimated control voltage is determined as the control voltage supplied to a voltage controlled oscillator. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008141583(A) 申请公布日期 2008.06.19
申请号 JP20060327059 申请日期 2006.12.04
申请人 NEC CORP 发明人 TAKADA TOMOHITO
分类号 H03L7/10;H03L7/087;H03L7/095;H04H20/18;H04H20/67;H04N5/04 主分类号 H03L7/10
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