| 摘要 |
A semiconductor memory device includes a memory cell which includes first and second inverter circuits. Each of the first and second inverter circuits includes a load transistor which includes a source connected to a first power supply terminal, and a driving transistor which includes a drain connected to a drain of the load transistor via a memory node, a gate connected to a gate of the load transistor, a source connected to a second power supply terminal, and a back gate connected to a third power supply terminal. A first power supply voltage is applied to the first power supply terminal. A ground voltage is applied to the second power supply terminal. A source voltage higher than the ground voltage is applied to the third power supply terminal.
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