发明名称 DIE POSITIONING FOR PACKAGED INTEGRATED CIRCUITS
摘要 A method that locates a plurality of die for forming a plurality of packaged integrated circuits. A frame is placed over the support structure, wherein the frame includes a plurality of openings therein and each opening of the plurality of openings has at least two walls. Each die of a plurality of die is placed over the support structure, wherein each die has at least two adjacent edges. The relative placing of the frame and the die results in each die being in an opening of the plurality of openings. Encapsulant is applied to the plurality of die. Either or both of the plurality of die and frame are moved in relation to the other in a manner that causes the two adjacent edges of each die of the plurality of die to substantially abut to and align with the two walls of an opening of the plurality of openings.
申请公布号 US2008138938(A1) 申请公布日期 2008.06.12
申请号 US20060567249 申请日期 2006.12.06
申请人 WENZEL ROBERT J;RUSTON MATTHEW A;WELLS DAVID M 发明人 WENZEL ROBERT J.;RUSTON MATTHEW A.;WELLS DAVID M.
分类号 H01L21/00 主分类号 H01L21/00
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