| 摘要 |
<p>A floating DC-offset circuit for a phase detector. The circuit may provide a floating DC-offset to the phase detector, or to the volftage-controlled oscillator of the phase-locked loop. The circuit includes a voltage comparator, a clock, a digital resistor, and an offset line to a DC-offset branch of the phase detector. The voltage comparator detects when the voltage at the output of the loop filter of the phase-locked loop has gone outside of a designated range, and activates the clock when the voltage is outside the designated range. The clock emits impulses that are counted by the digital resistor. The digital resistor shifts DC-offset at the DC-offset branch of the phase detector. The new DC-offset level is maintained once the voltage at the output of the loop filter has returned to within, the designated range. In an alternate embodiment, the DC-offset branch is connected to rough-tuning input of a wide-tuned voltage-controlled oscillator.</p> |
