发明名称 METHOD AND APPARATUS FOR TESTING A MEMORY CHIP
摘要 An apparatus and methods for testing an integrated device comprising memory a test device are provided. At least two data inputs of the memory are coupled to a data output of the test device. As an alternative, at least two data outputs of the memory are coupled to a data input of the test device. Test data are transferred from the test device to the memory chip and written to memory cells of the memory. Data are read from the memory cells of the memory and transferring from the memory to the test device. The data read from the memory chip are compared with the test data written to the memory in order to identify faults of the memory.
申请公布号 US2008141075(A1) 申请公布日期 2008.06.12
申请号 US20070934644 申请日期 2007.11.02
申请人 KLIEWER JOERG;PROELL MANFRED;SCHROEDER STEPHAN;EGGERS GEORG;RUF WOLFGANG;HASS HERMANN 发明人 KLIEWER JOERG;PROELL MANFRED;SCHROEDER STEPHAN;EGGERS GEORG;RUF WOLFGANG;HASS HERMANN
分类号 G06F11/00;G06F11/07;G11C7/00 主分类号 G06F11/00
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