发明名称 LOW POWER MEMORY DEVICE
摘要 In a memory device having a memory core and a signal interface, receiving a command that specifies at least a portion of a memory access. During the memory access, transferring data between the memory core and the signaling interface, and transferring the data between the signaling interface and an external signal path, and prior to transferring the data between the signaling interface and the external signal path, receiving enable information to selectively enable at least a first memory resource and a second memory resource, wherein each of the first memory resource and the second memory resource performs a control function associated with the memory access.
申请公布号 US2008140974(A1) 申请公布日期 2008.06.12
申请号 US20080018489 申请日期 2008.01.23
申请人 WARE FREDERICK A;TSERN ELY K;HAMPEL CRAIG E 发明人 WARE FREDERICK A.;TSERN ELY K.;HAMPEL CRAIG E.
分类号 G06F12/00 主分类号 G06F12/00
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