发明名称 CHIP STACKING PACKAGES AND METHOD OF MANUFACTURING THE SAME
摘要 A chip stack package and a manufacturing method thereof are provided to improve the yield of a first chip since it is not necessary to increase the size of the first chip form formation of plugs. A chip stack package includes an intermediate substrate(110) having a recess(112), a first chip(130) mounted in the recess, and a second chip(140) disposed on the intermediate substrate, the second chip being electrically connected to the first chip. A package substrate(150) is disposed under the intermediate substrate, and plugs(120) penetrate the intermediate substrate to electrically connect the second chip with the package substrate. The recess is disposed at a lower portion of the intermediate substrate, and the first and second chips are electrically connected to each other through second plugs.
申请公布号 KR20080051203(A) 申请公布日期 2008.06.11
申请号 KR20060121863 申请日期 2006.12.05
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 BAEK, SEUNG DUK;KANG, SUN WON
分类号 H01L23/12 主分类号 H01L23/12
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