发明名称 Shared redundant memory architecture and memory system incorporating same
摘要 A memory system incorporates shared redundant memories and has a shared redundant memory architecture. The memory system includes a modified memory to be used as a shared redundant memory between memory systems. These memory systems may have several smaller memories forming a single logical memory or various memories in close proximity on an integrated circuit system. The shared redundancy is achieved by adding a comparator to the redundant element for comparing between the faulty address and the system address and performing a memory operation based on the comparator output. As the redundant memory operations are performed in parallel to the memory structures, setup and hold times are reduced. Shared redundancy also results in reduced integrated circuit area.
申请公布号 US7385862(B2) 申请公布日期 2008.06.10
申请号 US20060460071 申请日期 2006.07.26
申请人 STMICROELECTRONICS PVT. LTD. 发明人 DUBEY PRASHANT
分类号 G11C7/00 主分类号 G11C7/00
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